Apple Patents Multi-Level Hybrid Memory Subsystem

Apple Patents Multi-Level Hybrid Memory Subsystem

Apple has nowadays patented a new strategy to how it uses memory in the Program-on-Chip (SoC) subsystem. With the announcement of the M1 processor, Apple has switched absent from the common Intel-supplied chips and transitioned into a thoroughly tailor made SoC structure referred to as Apple Silicon. The new models have to integrate every single part like the Arm CPU and a customized GPU. Both equally of these processors need to have very good memory entry, and Apple has figured out a solution to the problem of possessing both of those the CPU and the GPU accessing the identical pool of memory. The so-called UMA (unified memory entry) signifies a bottleneck mainly because the two processors share the bandwidth and the total memory potential, which would depart a single processor starving in some situations.

Apple has patented a style and design that aims to resolve this dilemma by combining high-bandwidth cache DRAM as well as high-potential key DRAM. “With two forms of DRAM forming the memory program, a person of which may be optimized for bandwidth and the other of which may possibly be optimized for potential, the plans of bandwidth improve and capability increase may possibly equally be understood, in some embodiments,” states the patent, ” to employ electrical power effectiveness enhancements, which may possibly provide a really electrical power-effective memory answer that is also high efficiency and significant bandwidth.” The patent acquired submitted way back again in 2016 and it indicates that we could get started looking at this technological know-how in the potential Apple Silicon designs, next the M1 chip.

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